Advancements in technology continue to create challenges in designing smaller, faster and more complicated integrated circuits having increased functionality. Some integrated circuits, such as an input/output pad configuration, can include input/output buffers circuits having input/output pins (e.g., input/output nodes) that interface with external components. In some embodiments, the input/output buffers circuits may operate at different supply voltages than the external components. For example, dimensions of modern transistors have been scaled down (e.g., to nanometer regions) and operate using decreased supply voltages such as 1.8 volts or less. However, external electrical systems or components that interface with the input/output pad may operate using a higher supply voltage such as 5 volts, for example. Therefore, it is desirable for input/output circuits to tolerate higher voltages and to interact with various external circuits or devices operating at different voltages than the input/output circuits.
One solution is to include voltage level shifters operating a higher voltages on a PC board external to an integrated circuit having the input/output circuit in order to tolerate the higher voltage supply. However, this solution requires extra space due to the external voltage level shifters, which can increase cost. In addition, by using multiple external voltage level shifters on a PC board, power consumption is increased, which is also undesirable.
Furthermore, known integrated circuits are typically designed to include a different I/O pad dedicated for each separate functions. For example, a series of dedicated I/O pads may be designed to interface with open drain interfaces (e.g., Display Data Channel (DDC) interfaces), other I/O pads are designed to be dedicated to interface with low swing output interfaces (e.g., Display Port Auxiliary (DP AUX) interfaces), still other I/O pads are dedicated to interface with rail to rail output circuits (e.g., general purpose input/output pads).
As such, a need exists for an improved input/output buffer configuration that can not only tolerate higher voltages, but can also support multiple functions through a single I/O pad configuration.